1. Field of the Invention
The present invention relates to a liquid crystal display, and more specifically to a drive technology of a liquid crystal display panel in which each pixel includes a plurality of sub-pixels.
2. Description of the Related Art
The viewing angle is one of the significant issues of the liquid crystal display device, and therefore various techniques have been proposed for improving the viewing angle. One known technique for improving the viewing angle is to compose one pixel with two or more sub-pixels and to drive the sub-pixels with different drive voltages. Typically, each pixel is composed of two sub-pixels. Driving the sub-pixels in the same pixel with different driving voltages allows orienting the liquid crystal molecules within the sub-pixels in the different directions. Such drive technique allows correcting and minimizing the distortion of the gamma curve when the image is viewed slantingly. Such technique is disclosed by Sang Soo Kim in a document titled “The World's Largest (82-in.) TFT-LCD,” SID 05 DIGEST, 2005, pp. 1842-1847.
This document discloses a double data line structure in which each pixel within the liquid crystal display panel is composed of two sub-pixels. FIG. 1 is a conceptual diagram showing a typical configuration of a liquid crystal display panel that adopts the double data line structure. In the liquid crystal display panel that adopts the double data line structure, each pixel is composed of two sub-pixels, and two data lines are arranged along each line of the pixels. One of the paired data lines is connected to one of the two sub-pixels within each corresponding pixel, and the other is connected to the other of the two sub-pixels. The two sub-pixels within one pixel are connected to the same gate line.
More specifically, each dot 101 includes three pixels: an R pixel 102, a G pixel 103, and a B pixel 104. The R pixels 102 are each composed of two R sub-pixels 102A and 102B, and two data lines Ri(A), Ri(B) are provided along each column of the R pixels 102; the R sub-pixel 102A is connected to the data line Ri(A) and the R sub-pixel 102B is connected to the data line Ri(B). The R sub-pixels 102A and 102B within the same R pixel 102 are connected to the same gate line. The G pixels 103 and the B pixels 104 are each structured similarly. The G pixels 103 are each composed of two G sub-pixels 103A and 103B, and two data lines Gi(A) and Gi(B) are provided along each column of the G pixels 103. Correspondingly, the B pixels 104 are each composed of two B sub-pixels 104A and 104B, and two data lines Bi(A) and Bi(B) are provided along each column of the B pixels 104.
As shown in FIG. 2, each sub-pixel includes a TFT (thin film transistor), a liquid crystal capacitor formed between a common electrode VCOM and a pixel electrode, and a retention capacitor formed between the common electrode VCOM and a retaining electrode. For example, the R sub-pixel 102A includes a TFT 105A, a liquid crystal capacitor 106A, and a retention capacitor 107A, and the R sub-pixel 102B includes a TFT 105B, a liquid crystal capacitor 106B, and a retention capacitor 107B. Other sub-pixels are similarly structured.
When a certain gate line Gi is selected, the R sub-pixel 102A connected to the gate line Gi is driven with a drive voltage supplied from the data line Ri(A), and the R sub-pixel 102B connected to the gate line Gn is driven with a drive voltage supplied from the data line Ri(B). The same goes for the G pixels 103 and the B pixels 104. When a certain gate line Gi is selected, the G sub-pixel 103A and the B sub-pixel 104A connected to the gate line Gi are driven with drive voltages supplied from the data lines Gi(A) and Bi(A), respectively, and the G sub-pixel 103B and the B sub-pixel 104B both connected to the gate line Gi is driven with drive voltages supplied from the data lines Gi(B) and Bi(B), respectively.
In the liquid crystal display panel with the configuration shown in FIGS. 1 and 2, the two sub-pixels are driven with different drive voltages for the same value of the image data. In other words, two sub-pixels within each pixel are driven in accordance with different gamma curves. Therefore, the generation of the drive voltages for driving the two sub-pixels requires gamma corrections in accordance with different gamma curves. In order to provide gamma corrections in accordance with different gamma curves, the liquid crystal display device shown in FIGS. 1 and 2 adopts a special drive method which is not commonly used in common liquid crystal display devices.
Japanese Laid Open Patent Application No. JP-P2007-226242A discloses a technique of driving a liquid crystal display panel of the configuration shown in FIGS. 1 and 2. FIG. 3 is a block diagram showing the configuration of a liquid crystal display device 100 disclosed in this Japanese patent application. The liquid crystal display device 100 is provided with a liquid crystal panel 110 structured as shown in FIGS. 1 and 2, a storage unit 120, a timing controller 130, a gate driver 140, and a data driver 150. Since an architecture in which the liquid crystal display is constructed with a timing controller IC (Integrated Circuit), a gate drive IC, a data driver IC is one of the common architectures of the liquid crystal displays, the person skilled in the art would understand that the timing controller 130, the gate driver 140, and the data driver 150 correspond to a timing controller IC, a gate driver IC, and a data driver IC, respectively. The storage unit 120 includes a first storage part 122 containing an LUT describing a gamma curve for “high pixels” (namely, the R sub-pixel 102A, the G sub-pixel 103A, and the B sub-pixel 104A), and a second storage part 124 for containing an LUT describing a gamma curve for “low pixels” (namely, the R sub-pixel 102B, the G sub-pixel 103B, and the B sub-pixel 104B). The first and second storage parts 122 and 124 are each provided with different LUTs for red (R), green (G), and blue (B) colors.
The liquid crystal display device 100 operates as follows: The timing controller 130 generates first image data RH, GH and BH from image signals R, G and B using the LUTs stored in the first storage part 122, and also generates the second image data RL, GL, and BL from image signals R, G, and B using the LUTs stored in the second storage part 124. The timing controller 130 transmits the first image data RH, GH and BH and the second image data RL, GL and BL to the data driver 150. The data driver 150 drives the “high pixels” in response to the first image data RH, GH, and BH, and drives the “low pixels” responding to the image data RL, GL, and BL.
One drawback of the liquid crystal display device 100 of FIG. 3 is the increase in the data transmission amount to the data driver 150 (or the data driver IC). The liquid crystal display device 100 shown in FIG. 3 requires transmitting two pieces of image data (i.e. the first and second image data) for each pixel. The liquid crystal display device 100 shown in FIG. 3 requires increased bit widths in transmitting the first and second image data. For a case where the image signals R, G and B are all 10-bits data, for example, the bit widths of the first image data RH, GH and BH and the second image data RL, GL and BL must be more than 10 bits (e.g. 12 bits), for performing gamma correction on the image signals R, G, and B. Therefore, the liquid crystal display device 100 undesirably requires transmitting an increased amount of data to the data driver 150. This necessitates an increased data transfer rate to transmit an increased amount of data within each horizontal period, the length of which is standardized in the standard use. The increase in the data transfer rate is not preferable, because this may increase the data error rate.